The objective of this one-day workshop is to investigate opportunities in accelerating analytics workloads and data management systems. Over the years, the scope of database analytics has changed substantially, beginning with traditional OLAP, data warehousing, ETL, to HTAP, Streaming/Real-time Processing, Edge/IoT, and finally to machine learning and deep learning workloads such as Generative AI or Vector/semantic databases. Increasing use of Large Language Models(LLMs) for as a source for knowledge extraction for various end uses (e.g., in an AI assistant or Agentic system), creates new opportunities for database systens. At the same time, hardware and software capabilities have seen tremendous improvements. The workshop aims to explore how database analytics can be accelerated using modern processors (e.g., commodity and specialized Multi-core, Many-core, chiplets, GPUs, and FPGAs), processing systems (e.g., hybrid, massively-distributed clusters, and cloud based distributed computing infrastructure), networking infrastructures (e.g., RDMA over InfiniBand), memory and storage systems (e.g., storage-class Memories like SSDs, active memories, NVRAM, and Phase-change Memory), multi-core and distributed programming paradigms like CUDA/OpenCL, MPI/OpenMP, and MapReduce/Spark, and integration with data-science/deep-learning frameworks such as Sklearn, TensorFlow, or PyTorch. Exploratory topics such as DNA-based storage or quantum algorithms are also within the preview of the ADMS workshop. The intent of the ADMS workshop is to bring together people from diverse fields such as computer architecture, high-performance computing, systems, and programming languages to address key functionality and scalability problems in data management.

The current data management scenario is characterized by the following trends: traditional OLTP and OLAP/data warehousing systems are being used for increasing complex workloads (e.g., integration of various AI technologies, Petabyte of data, complex queries under real-time constraints, etc.); applications are becoming far more distributed, often consisting of different data processing components; non-traditional domains such as bio-informatics, social networking, mobile computing, sensor applications, gaming are generating growing quantities of data of different types; economical and energy constraints are leading to greater consolidation and virtualization of resources; and analyzing vast quantities of complex data is becoming more important than traditional transactional processing.

At the same time, there have been tremendous improvements in the CPU and memory technologies. Newer processors are more capable in the compute and memory capabilities, are power-efficient, and are optimized for multiple application domains. Commodity systems are increasingly using multi-core processors with more than 6 cores per chip and enterprise-class systems are using processors with at least 32 cores per chip. Specialized multi-core processors such as the GPUs have brought the computational capabilities of supercomputers to cheaper commodity machines. On the storage front, FLASH-based solid state devices (SSDs) are becoming smaller in size, cheaper in price, and larger in capacity. Exotic technologies like Phase-change memory are on the near-term horizon and can be game-changers in the way data is stored and processed.

In spite of the trends, currently there is limited usage of these technologies in data management domain. Naive exploitation of multi-core processors or SSDs often leads to unbalanced systems. It is, therefore, important to evaluate applications in a holistic manner to ensure effective utilization of CPU and memory resources. This workshop aims to understand impact of modern hardware technologies on accelerating core components of data management workloads. Specifically, the workshop hopes to explore the interplay between overall system design, core algorithms, query optimization strategies, programming approaches, performance modelling and evaluation, etc., from the perspective of data management applications.

The suggested topics of interest include, but are not restricted to:

• Hardware and System Issues in Domain-specific Accelerators
• New Programming Methodologies for Data Management Problems on Modern Hardware
• Query Processing for Hybrid Architectures
• Large-scale I/O-intensive (Big Data) Applications
• Parallelizing/Accelerating Machine Learning/Deep Learning Workloads
• Accelerating training, inference, and storage of Large Language Models for Generative AI
• Autonomic Tuning for Data Management Workloads on Hybrid Architectures
• Algorithms for Accelerating Multi-modal Multi-tiered Systems
• Applications of GPUs and other data-parallel accelerators
• Energy Efficient Software-Hardware Co-design for Data Management Workloads
• Parallelizing non-traditional (e.g., graph mining) workloads
• Algorithms and Performance Models for modern Storage Sub-systems
• Exploitation of specialized ASICs
• Novel Applications of Low-Power Processors and FPGAs
• Exploitation of Transactional Memory for Database Workloads
• Exploitation of Active Technologies (e.g., Active Memory, Active Storage, and Networking)
• New Benchmarking Methodologies for Accelerated Workloads
• Applications of HPC Techniques for Data Management Workloads
• Acceleration in the Cloud Environments
• Accelerating Data Science/Machine Learning Workloads
• Exploratory topics such as Generative AI, DNA-storage, Quantum Technologies

Keynote Presentations

• Building General-Purpose Bitmap Indexes: A tale of CUBIT, RABIT, and beyond. Manos Athanassoulis, Associate Professor of Computer Science, Boston University
  Abstract: In this talk, I will describe our journey to elevate bitmap indexes from read-only indexes to update-friendly, highly concurrent, range-query friendly, secondary indexes that can be used as general-purpose secondary indexes for hybrid workloads. Our designs rely on the following principles: First, we employ a horizontal bitwise representation of updated bits, which enables efficient atomic updates without locking entire bitvectors. Second, we propose a lightweight snapshotting mechanism that allows queries to run on separate snapshots and provides a wait-free progress guarantee. Third, we consolidate updates in a latch-free manner, providing a strong progress guarantee. Fourth, we propose a new encoding scheme that extends the traditional equality encoding with group bitvectors that facilitate both short- and long-range queries without sacrificing update or space efficiency. A crucial component of the performance gains comes from carefully using modern SIMD commands. Our evaluation when integrating with DuckDB query engine shows that our bitmap index variants (CUBIT and RABIT) can outperform state-of-the-art analytical engines by several orders of magnitude. Overall, our work breaks the assumption that bitmap indexes target only read-only queries with low cardinality, making them general-purpose contenders for hybrid workloads. For HTAP workloads with real-time updates, our designs achieve 2–11x performance improvement over the state-of-the-art approaches. We will conclude by discussing future directions about bitmap indexes and query processing with bitvectors.
  Bio: Manos Athanassoulis is an Associate Professor of Computer Science at Boston University, Director and Founder of the BU Data-intensive Systems and Computing Laboratory, and co-director of the BU Massive Data Algorithms and Systems Group. He also spent a summer as a Visiting Faculty at Meta. His research is in the area of data management, focusing on building data systems that efficiently exploit modern hardware (computing units, storage, and memories), are deployed in the cloud, and can adapt to the workload both at setup time and dynamically, at runtime. Before joining Boston University, Manos was a postdoc at Harvard University. Earlier, he obtained his PhD from EPFL, Switzerland, and spent one summer at IBM Research, Watson. Manos’ work has been recognized by awards like "IEEE Computer Society Distinguished Contributor", Class of 2025, “Best of SIGMOD” in 2016, “Best of VLDB” in 2010 and 2017, “Most Reproducible Paper” at SIGMOD in 2017, and "Best Demo" for VLDB 2023. His research has been supported by multiple NSF grants including an NSF CRII and an NSF CAREER award, and industry funds including a Facebook Faculty Research Award, multiple Red Hat Research Incubation Awards and gifts from Cisco, Red Hat, and Meta. He is currently serving as ACM SIGMOD Secretary/Treasurer 2025-2029, Associate Editor for the VLDB Journal, Associate Editor for ACM SIGMOD Record, Local Arrangements Chair for VLDB 2026, and Area Chair for VLDB 2027.
• Special hash values for linear-time sorting Goetz Graefe, Principal Researcher, Google, Madison, Wisconsin.
  Abstract: Computing traditional hash values requires O(N*K) effort for N rows with K key columns. Less than N*K column value comparisons suffice not only for verifying or compressing a sorted stream but also for sorting an unsorted database table; for duplicate removal, grouping, and pivoting; and even for complex rollup operations. This talk reviews published techniques and introduces new ones -- for adaptive sorting, for cache optimizations, and for external sorting. Some hardware support is already in daily use.
  Bio: Goetz Graefe published surveys on database concurrency control, logging and recovery, indexing, sorting, query execution, and query optimization. Since graduating from the University of Wisconsin–Madison with an MS (1984) and a PhD (1987) with a thesis on extensible database query optimization in EXODUS, he invented the Exchange iterator for parallel query execution as well as the Volcano and Cascades frameworks for query optimization, watched as academia and industry widely adopted and copied these designs, received an ACM SIGMOD Test of Time award and the inaugural IEEE ICDE Influential Paper award for these inventions, served as the query processing architect of Microsoft SQL Server through its formative years, researched robust query performance, concurrency control, logging, and instant recovery as an HP Fellow at HP Labs, shared in an ACM Software Systems award for the Gamma database machine, and has been honored with the 2017 ACM SIGMOD Edgar F. Codd Innovations award. He is now a Principal Researcher at Google and the Technical Lead of the F1 Query system widely used within Google.
• From MapD to Sirius: Co-Designing GPU-Native OLAP, Joshua Patterson, Vice President, NVIDIA
  Abstract: GPU acceleration of analytical databases has evolved from accelerating individual operators to redesigning complete query engines around heterogeneous computing. MapD demonstrated how columnar execution, LLVM-based query compilation, and GPU memory bandwidth could enable interactive analysis over billions of rows. Theseus extended this approach with asynchronous execution and coordinated data movement across GPU, CPU, storage, and distributed resources. Sirius advances the model toward a composable GPU-native backend that can integrate with existing database systems through interoperable query representations and reusable accelerated libraries. This evolution has been enabled by corresponding advances in hardware: coherent CPU–GPU interconnects such as NVLink-C2C, NVLink fabrics extending beyond a single node, GPUDirect Storage for direct movement between storage and GPU memory, and nvCOMP for accelerated compression and decompression. These capabilities require query engines to jointly optimize computation, data placement, communication, and concurrency. This talk examines the hardware–software co-design principles behind these systems and introduces SPACE MICE: Scale, Performance, and Concurrent Execution through Modular, Interoperable, Composable, and Extensible components.
  Bio: Joshua Patterson is Vice President of Solutions Architecture—Accelerating Data Processing at NVIDIA, where he works on GPU-accelerated systems for analytics, data science, graph processing, vector search, and AI.  He created RAPIDS, NVIDIA’s open-source GPU data science ecosystem, and has been a leading advocate for interoperable analytics frameworks that minimize data movement across applications and computing environments.  Before returning to NVIDIA, Joshua co-founded and served as CEO of Voltron Data, where the company developed Theseus, a distributed GPU query engine, and advanced composable data systems based on open standards.  Previously, he was a White House Presidential Innovation Fellow and led large-scale cyber-defense and data-visualization work at Accenture Technology Labs.

Accepted Papers

• Accelerating Presto with GPUs, Sean Rooney, Luis Garcés-Erice, Daniel Bauer, Zoltan Nagy, IBM, Greg Kimball, NVIDIA, Deepak Majeti, IBM, Devavret Makkar, Todd Mostak and Karthikeyan Natarajan, NVIDIA
• Maintainable, Low-Latency and High-Quality Query Compilation with MLIR and TPDE, Jonas Ladner, Technical University of Munich, Lukas Döllerer, CedarDB, Alexis Engelke, Univ. Grenoble Alpes, Inria, CNRS, Grenoble INP, LIG, and Michael Jungmair, Technical University of Munich
• High-Throughput LLM-Based Compression and What It Takes, David Adams, University of Melbourne, Luisa Neubauer, Ping-Lin Kuo, Mihail Stoian, University of Technology Nuremberg, Thomas Rückstieß, Relaxed Constraints, Josif Grabocka, University of Technology Nuremberg, Renata Borovica-Gajic, University of Melbourne, and Andreas Kipf,University of Technology Nuremberg
• OptFSST: Optimized FSST String Compression, Hedi Chehaidar,Technical University of Munich, Mihail Stoian, Moritz Stargalla and Andreas Kipf, University of Technology Nuremberg
• Automated Operator Fusion for GPU-Accelerated SQL: Generation and Evolutionary Refinement, Corey Lammie, Yotam Perlitz, Andrea Giovannini and Abdel Labbi. IBM Research, Zurich
• Rubberband: Memory-Elastic, Skew-Tolerant GPU Hash Joins, Hangdong Zhao, Rathijit Sen, Craig Peeper and Matteo Interlandi, Microsoft
• The Free Lunch Has a Queue: Characterizing On-chip Compression Accelerators for Analytics, Yi Jiang, Antonio Boffa, Hamish Nicholson and Anastasia Ailamaki, EPFL
• HetMatch: GPU-Accelerated Heterogeneous String Pattern Matching, Abigale Kim and Xiangyao Yu, University of Wisconsin—Madison

Organization

Workshop Co-Chairs

• Rajesh Bordawekar, NVIDIA
• Tirthankar Lahiri, Oracle

       For questions regarding the workshop please send email to contact@adms-conf.org.

Program Committee

• Francesco Fusco, IBM Research, Zurich
• Viktor Sanca, Oracle
• Georgiy Lebedev, EPFL
• Selim Tekin, Georgia Tech
• Marcel Weisgut, EPFL and Hasso Plattner Institute
• Peter Hofstee, IBM
• Tyler Allen, NVIDIA
• Bulent Abali
• Christos Laspias, CMU
• Chinmayi Krishappa, Oracle

Important Dates

• Paper Submission: Monday, 25 May, 2026, 9 am EST
• Notification of Acceptance: Monday, 22 June, 2026
• Camera-ready Submission: Friday, 10 July, 2026
• Workshop Date: Monday, 31 August, 2026

Submission Site 

All submissions will be handled electronically via EasyChair.

Publication and Formatting Guidelines 

The ADMS'26 proceedings will be published as a part of the official VLDB Workshop Proceedings and indexed via DBLP.

We will use the same document templates as the VLDB conference. You can find them here.

It is the authors' responsibility to ensure that their submissions adhere strictly to the VLDB format detailed here. In particular, it is not allowed to modify the format with the objective of squeezing in more material. Submissions that do not comply with the formatting detailed here will be rejected without review. 

As per the VLDB submission guidelines, the paper length for a full paper is limited to 12 pages, excluding bibliography. However, shorter papers (at least 6 pages of content) are encouraged as well.